The Learn the Analysis of a D-Latch flip-flop with Deeds
Many applications require SET and RESET conditions of the latch. In these applications, inputs (S and R) always complement each other. This can be designed by a single input (S) to the latch and the R input achieved by inverting this S. This single input is called data input and it is labelled with D.This is why this type of single input Flip flop is known as a D-Flip Flop or D Latch.(Rajah 1) Gated D Latch There are many applications where separate S and R inputs are not required. In these cases by creating D flip-flop we can omit the conditions where S = R = 0 and S = R = 1. In D flip-flop if D = 1 then S = 1 and R = 0 hence the latch is set on the other hand if D = 0 then S = 0, and R = 1 hence the latch is reset. This is known as a Gated D Latch. when D = 1 and EN = 1 the gated latch D flip-flop is ENABLE and SET when D = 0 and EN = 1 the latch is ENABLE and RESET but when EN = 0 the latch is DISABLE no question of SET REST. That means at EN = 0, any change in input D does not affect the output (No Change Condition). SET means output Q = 1 and RESET means Q = 0 so Q = D or output follows input when EN is High and this is the reason for which it is that a LOW D input makes Q Low
Manual Pengguna, (2022). Aplikasi Pendidikan dan Reka Bentuk Elektronik Digital (S. Widyarto, Ed. & Trans.; 1st ed.). International Community Forum (ICF).